The Compilation of Regular Expressions into Integrated Circuits

Abstract

The design of integrated cLrcuJts to Implement arbitrary regular expressions is considered In general, a regular expression with n operands may be converted into a nondetermmlstlc fimte automaton with at most n states and n trans~uons Instead of converting the nondetermtntsttc device to a determm~suc one, two ways of implementing the nondetermlnistlc dewce directly are proposed. One approach is to produce a PLA (programmable logic array) of approximate dimensions n rows and 2n columns by representing the states of the nondetermm~stlc fimte automaton directly by columns This approach, whde theoreucally suboptimal, makes use of carefully developed technology and, because of the care with which PLA implementation has been done, may be the preferred techmque m many real sttuatlons Another approach ~s to use the hierarchical structure of the automaton produced from the regular expression by the McNaughton-Yamada algorithm to grade a hierarchical layout of the ctrcmt. This method produces a clrcmt O(x/n) on a side and ~s, to w~thin a constant factor, the best that can be done m general. © 1982, ACM. All rights reserved.