This chapter discusses VHDL and introduces the concept and mechanisms of reuse. The concept of reuse is simple. Information is provided for use of libraries and packages used in VHDL code and how conflicts are resolved between packages while working in real time are explained. Code snippets are provided for the learner and examples are provided with code analysis for each section. The VHDL constructs, namely, generic and constants, are explained for their differences and usage under various situations. The syntax for different statements under VHDL language is explained with examples and detailed explanations are available. This chapter covers in detail how to use functions and procedures while developing code. It also contains topics on use of packages, libraries, and simulation in VHDL. Several standard packages, namely IEEE_1164, NUMERIC_STD, and TEXTIO packages, are also explained for reference.
CITATION STYLE
Pang, A., & Membrey, P. (2017). VHDL 101. In Beginning FPGA: Programming Metal (pp. 117–123). Apress. https://doi.org/10.1007/978-1-4302-6248-0_6
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