Speeding up target address generation using a self-indexed FTB

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Abstract

The fetch target buffer (FTB) holds information on basic blocks to predict taken branches in the fetch stream and also their target addresses. We propose a variation to FTB, the self-indexed FTB, which, through an extra level of indirection, provides the high hit rate of a relatively large, high-associative FTB with the fast access delay of a small, direct-mapped FTB. The critical and most frequent operation –predicting the next FTB entry– is speeded up, whilst less frequent operations –such as recovering from FTB misses– are slightly slowed down. The new design is both analyzed and simulated. Performance increase on a 512-entry FTB is estimated at between 15% and 30%.

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Moure, J. C., Rexachs, D. I., & Luque, E. (2002). Speeding up target address generation using a self-indexed FTB. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 2400, pp. 517–521). Springer Verlag. https://doi.org/10.1007/3-540-45706-2_70

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