Abstract
Reduced instruction set computers aim for both simplicity in hardware and synergy between architectures and compilers. Optimizing compilers are used to compile programming languages down to instructions that are as unencumbered as microinstructions in a large virtual address space, and to make the instruction cycle time as fast as possible. © 1985, ACM. All rights reserved.
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CITATION STYLE
APA
Patterson, D. A. (1985). Reduced instruction set computers. Communications of the ACM, 28(1), 8–21. https://doi.org/10.1145/2465.214917
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