FPAA based on integration of CMOS and nanojunction devices for neuromorphic applications

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Abstract

In this paper, a novel field programmable analog arrays (FPAA) architecture, namely, NueroFPAA, is introduced to utilize nanodevices to build a programmable neuromorphic system. By using nanodevices as programmable components, the proposed FPAA can achieve high-density and low-power operations for neuromorphic applications. The routing and function blocks of the FPAA are specifically designed so that this proposed architecture can support large-scale neuromorphic design as well as various analog circuitries. © ICST Institute for Computer Sciences, Social Informatics and Telecommunications Engineering 2009.

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Liu, M., Yu, H., & Wang, W. (2009). FPAA based on integration of CMOS and nanojunction devices for neuromorphic applications. In Lecture Notes of the Institute for Computer Sciences, Social-Informatics and Telecommunications Engineering (Vol. 3 LNICST, pp. 44–48). https://doi.org/10.1007/978-3-642-02427-6_9

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