Parallelizing simulated annealing algorithm in many integrated core architecture

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Abstract

The simulated annealing algorithm (SAA) is a wellestablished approach to the approximate solution of combinatorial optimisation problems. SAA allows for occasional uphill moves in an attempt to reduce the probability of becoming stuck in a poor but locally optimal solution. Previous work showed that SAA can find better solutions, but it takes much longer time. In this paper, in order to harness the power of the very recent hybrid Many Integrated Core Architecture (MIC), we propose a new parallel simulated annealing algorithm customised for MIC. Our experiments with the Travelling Salesman Problem (TSP) show that our parallel SAA gains significant speedup.

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APA

Zhou, J., Xiao, H., Wang, H., & Dai, H. N. (2016). Parallelizing simulated annealing algorithm in many integrated core architecture. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 9787, pp. 239–250). Springer Verlag. https://doi.org/10.1007/978-3-319-42108-7_18

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