Matrix multiplication parallelization on a many-core platform

0Citations
Citations of this article
1Readers
Mendeley users who have this article in their library.
Get full text

Abstract

This paper introduces an approach to analyze the power and energy consumption of a many-core system. The investigation has been done by using the Intel SCC system as an experimental platform. The approach is to collect the time and power profiling of an executing application on the Intel SCC system. And then, we find the total energy consumed for the entire execution. We studied the effects of power and energy consumption in many-core systems by varying different hardware configuration parameters such as number of cores, clock frequency and voltage level. Thus, the many-core system can be explored for its scalability, fitness in operational cost and performance. © 2011 Springer-Verlag.

Cite

CITATION STYLE

APA

Thanarungroj, P., & Liu, C. (2011). Matrix multiplication parallelization on a many-core platform. In Lecture Notes in Electrical Engineering (Vol. 133 LNEE, pp. 19–26). https://doi.org/10.1007/978-3-642-25992-0_3

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free