Software compilation techniques for MPSoCs

0Citations
Citations of this article
5Readers
Mendeley users who have this article in their library.
Get full text

Abstract

The increasing demands such as high-performance and energy-efficiency for future embedded systems result in the emerging of heterogeneous Multiprocessor System-on-Chip (MPSoC) architectures. To fully enable the power of those architectures, new tools are needed to take care of the increasing complexity of the software to achieve high productivity. An MPSoC compiler is the tool-chain to tackle the problems of expressing parallelism in applications' modeling/programming, mapping/scheduling and generating the software to distribute on an MPSoC platform for efficient usage, for a given (pre-)verified MPSoC platform. This chapter talks about the various aspects ofMPSoC compilers for heterogeneous MPSoC architectures, using a comparison to the well-established uni-processor C compiler technology. After a brief introduction to MPSoC and MPSoC compilers, the important ingredients of the compilation process, such as programming models, granularity and partitioning, platform description, mapping/scheduling and codegeneration, are explained in detail. As the topic is relatively young, a number of case studies from academia and industry are selected to illustrate the concepts at the end of this chapter.

Cite

CITATION STYLE

APA

Leupers, R., Sheng, W., & Castrillon, J. (2013). Software compilation techniques for MPSoCs. In Handbook of Signal Processing Systems: Second Edition (pp. 1215–1257). Springer New York. https://doi.org/10.1007/978-1-4614-6859-2_37

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free