High-performance interface architectures for cryptographic hardware

Abstract

In general, secure communication in a distributed system that spans physically insecure networks and hosts must be implemented using cryptography. Software implementations of cryptographic algorithms such as DES are much slower than typical network bandwidths. However, fast hardware implementations of these algorithms are being developed [4, 6] and are projected to have encryption speeds comparable to network bandwidths (i.e., 10–100 megabits per second).