Subjecting legacy simulink models to timing specifications

Abstract

The interest in the logical execution time (LET) paradigm has recently experienced a boost, especially in the automotive industry. This is because it is considered a practical candidate for migrating concurrent legacy software from single- to multi-core platforms by introducing deterministic intra- and inter-core communication. In many cases, the implementation of these individual software components roots in MATLAB/Simulink, a modeling and simulation environment, where the controller functionality is described with a block-oriented formalism and simulated with synchronous reactive semantics. Considering LET already in the modeling and simulation phase instead of deferring this to the integration phase, as it is done now, is an important step towards the idea of models being the single source of truth and to estimate the effect of LET on end-to-end timing in cause-effect-chains at an early stage. This paper presents two approaches of simulating software components with LET semantics in Simulink. In contrast to previous work, which deals with clean slate top-down approaches, we focus on legacy software (in the form of Simulink models) that does not satisfy some of the initial assumptions of the LET programming model.