In this paper we present a hardware architecture for a Support Vector Machine intended for vision applications to be implemented in a FPGA device. The architecture computes the contribution of each support vector in parallel without performing multiplications by using a CORDIC algorithm and a hardware-friendly kernel function. Additionally input images are not preprocessed for feature extraction as each image is treated as a point in a high dimensional space. © 2009 Springer Berlin Heidelberg.
CITATION STYLE
Ruiz-Llata, M., & Yébenes-Calvino, M. (2009). FPGA implementation of support vector machines for 3D object identification. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5768 LNCS, pp. 467–474). https://doi.org/10.1007/978-3-642-04274-4_49
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