Implementation of an Efficient Library for Asynchronous Circuit Design with Synopsys

Abstract

In certain applications, asynchronous integrated circuits offer several benefits including speed and power. However, it is difficult to take advantage of these benefits because of the lack of asynchronous design methodology and integration with EDA software tools. Most digital circuits are synchronous, so most of the design tools are intended for synchronous design. In this paper a customized C-element was developed, integrated with Synopsys software and tested by incorporating it in a HDL design. An asynchronous FIFO was designed and synthesized as a test case. The results were compared to a synchronous FIFO for throughput, latency, area, and power. © Springer International Publishing Switzerland 2015.