In this article we discuss dual/multi-rail routing techniques in an island style FPGA for robustness against side-channel attacks. We present a technique to achieve dual-rail routing balanced in both timing and power consumption with the traditional subset switchbox. Secondly, we propose two switchboxes (namely: Twist-on-Turn & Twist-Always) to route every dual/multi-rail signal in twisted pairs, which can deter electromagnetic attacks. These novel switchboxes can also be balanced in power consumption albeit with some added cost. We present a layout with pre-placed switches and pre-routed balanced wires and extraction statistics about the expected balance. As conclusion, we discuss various overheads associated with these techniques and possible improvements. © 2008 Springer-Verlag Berlin Heidelberg.
CITATION STYLE
Chaudhuri, S., Guilley, S., Hoogvorst, P., Danger, J. L., Beyrouthy, T., Razafindraibe, A., … Renaudin, M. (2008). Physical design of FPGA interconnect to prevent information leakage. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4943 LNCS, pp. 87–98). https://doi.org/10.1007/978-3-540-78610-8_11
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