This paper proposes a failureless pipelined Aho-Corasick (FPAC) algorithm that generates the failureless pipelined deterministic-finite automaton (DFA). The failureless pipelined DFA generated by the FPAC algorithm does not store the failure pointers for reducing hardware overhead. Moreover, by sharing common prefixes, the information for storing states can be compressed. Because the pipeline register stores the state in each stage, the failureless pipelined DFA can perform multiple state transitions in parallel. Therefore, throughput can be increased with multiple homogeneous DFAs. In the experiments with cost-effective FPGAs, the implementation of the proposed FPAC algorithm shows high performance and low hardware overhead compared to several FPGA-based string matching engines.
CITATION STYLE
Kim, H. J. (2015). A failureless pipelined Aho-Corasick algorithm for FPGA-based parallel string matching engine. Lecture Notes in Electrical Engineering, 339, 157–164. https://doi.org/10.1007/978-3-662-46578-3_19
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