A novel predication scheme for a SIMD system-on-chip

Abstract

This paper presents a novel predication scheme that was applied to a SIMD system-on-chip. This approach was devised by improving and combining the unrestricted predication model and the guarded execution model. It is shown that significant execution autonomy is added to the SIMD processing elements and that the code size is reduced considerably. Finally, the implemented predication scheme is compared with predication schemes of general purpose processors, and it is shown that it enables more efficient if-conversion compilations than previous architectures.