Asynchronous Gate Signal Driving Method for Reducing Current Imbalance of Paralleled IGBT Modules Caused by Driving Circuit Parameter Difference

Abstract

Insulated-gate bipolar transistors (IGBTs) always operate in parallel for a large output current in modern high-power converter design. Suppressing dynamic current imbalance of the paralleled IGBTs is crucial for stable operation of converters. Though dynamic current imbalance could be suppressed by the symmetrical power loop design and consistent control signal, there is an inherent parameter difference in the power loop or gate circuit caused by the practical factors such as materials, physical dimensions and installation methods. The inherent difference could be compensated with gate delay control in a certain degree. The voltage and current in the key dynamic phases of IGBT are analyzed to obtain the delay compensation in gate delay control. An asynchronous gate signal driving method based on reference signal selections is proposed to suppress dynamic imbalance of collector current from parallel connected IGBTs, and the implementation of the asynchronous drive is described in brief. By using simulation software, the delay settings and dynamic current imbalance under different parameters discrepancy of drive circuit are obtained. The delay difference from key dynamic phases is calculated as the compensation for balanced dynamic current sharing under two selections of reference signals. Furthermore, the dynamic current distribution in the turn-on and turn-off phases is compensated by the asynchronous drive control. The optimization of asynchronous drive method on dynamic current sharing of paralleled IGBTs is verified by comparing dynamic current imbalance between the system with compensation and the system without compensation.