Evaluating the worst-case performance of flash translation layer

Abstract

NAND-based block devices are widely used in various computing devices, and the intesive studies have been performed to improve the average performance of NAND-based block devices with desiging efficient flash translation layer (FTL) schemes. However, the worst-case performance has been beyond the focus. The goal of this work is to evaluate the worst-case performance of the representive FTL schemes. The trace-drive simulation shows that the page mapping scheme delivers the best worst-case performance. In contrast, the FAST scheme and the SBAST scheme, which deliver a good average performance, are bad in the aspect of the worst-case performance. © 2012 Springer-Verlag Berlin Heidelberg.