A comparison of machine learning classifiers for FPGA implementation of HOG-based human detection

Abstract

In this paper, we demonstrate and compare FPGA implementations of Real AdaBoost classifiers and linear SVM classifiers for image-based human detection using histograms of oriented gradients (HOG) features, in terms of performance, hardware amount and accuracy of detection. In both architectures, a deep-pipelined stream structure and fixed-point arithmetic are employed. The evaluation results show the comparative analysis of the performance, resources, accuracy of detection between Real AdaBoost and the SVM. While FPGA resources required for Real AdaBoost designs are increased with the number of weak classifiers, the largest Real AdaBoost design with 1, 737 weak classifiers can be implemented using approximately 60% LUTs compared to the SVM counterpart. Although software implementation of the Real AdaBoost is much slower than the SVM due to serial evaluation of weak classifiers, the AdaBoost achieves a slightly better throughput on an FPGA, taking an advantage of parallel processing. For the detection accuracy, the AdaBoost designs are better than the SVM designs when the same number of training data is utilized. As regards the embedded use with low power requirements, the AdaBoost approach is suitable, while the linear SVM approach has a possibility to achieve a high degree of accuracy on rather large high-end FPGA systems.