In this paper, we present the design of an advanced system-on-chip architecture for mobile computing devices. The presented architecture facilitates connectivity to an ARM compatible host processor, high-speed intellectual property (IP) cores and slower peripherals using industry standard advanced microcontroller bus architecture. The system consist of standard set of peripherals, such as clock generator, real time clock, a watchdog timer, an interrupt controller, programmable I/O, I2C Host, SPI master, UARTs, trusted platform module, NAND flash controller and USB controllers. Third party 2D/3D graphics engine, audio/video encoder-decoder, wireless network controller IPs are also integrated to provide a complete platform architecture for the development of mobile computing devices.
CITATION STYLE
BenSaleh, M. S., Qasim, S. M., & Obeid, A. M. (2019). Toward Design of Advanced System-on-Chip Architecture for Mobile Computing Devices. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 11557 LNCS, pp. 88–95). Springer Verlag. https://doi.org/10.1007/978-3-030-22885-9_9
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