Elliptic curve cryptography is highly suited for implementation in resource constrained environments, however, dedicated hardware accelerators are necessary to provide the low power/energy security required in small, battery powered devices. This paper presents a low energy ASIC implementation of an elliptic curve processor which consumes minimal energy per point multiplication, thereby prolonging battery life in constrained devices. The energy/power/area trade-off is explored. In 0.13 μm CMOS technology the architecture consumes a minimum of 1.32μJ at 500 kHz using a digit size of 15 and 24.6 kgates. © 2009 Springer Berlin Heidelberg.
CITATION STYLE
Keller, M., & Marnane, W. (2009). Energy efficient elliptic curve processor. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 5349 LNCS, pp. 287–296). https://doi.org/10.1007/978-3-540-95948-9_29
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