Modeling the traffic effect for the application cores mapping problem onto NoCs

Abstract

This work addresses the problem of application mapping in networks-on-chip (NoCs), having as goal to minimize the total dynamic energy consumption of complex system-on-a-chips (SoCs). It explores the importance of characterizing network traffic to predict NoC energy consumption and of evaluating the error generated when the bit transitions influence on traffic is neglected. In applications that present a large amount of packet exchanges the error is propagated, significantly affecting the mapping results. The paper proposes a high-level application model that captures the traffic effect, enabling to estimate the dynamic energy consumption. In order to evaluate the quality of the proposed model, a set of real and synthetic applications were described using both, a previously proposed model that does not capture the bit transition effect, and the model proposed here. Each highlevel application model was implemented inside a framework that enables the description of different applications and NoC topologies. Comparing the resulting mappings, the model proposed displays an average improvement of 45% in energy saving. © 2007 Springer Science+Business Media, LLC.