Design of a 40-nm CMOS integrated on-chip oscilloscope for 5-50 GHz spin wave characterization

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Abstract

Spin wave (SW) devices are receiving growing attention in research as a strong candidate for low power applications in the beyond-CMOS era. All SW applications would require an efficient, low power, on-chip read-out circuitry. Thus, we provide a concept for an on-chip oscilloscope (OCO) allowing parallel detection of the SWs at different frequencies. The readout system is designed in 40-nm CMOS technology and is capable of SW device characterization. First, the SWs are picked up by near field loop antennas, placed below yttrium iron garnet (YIG) film, and amplified by a low noise amplifier (LNA). Second, a mixer down-converts the radio frequency (RF) signal of 5 - 50 GHz to lower intermediate frequencies (IF) around 10 - 50 MHz. Finally, the IF signal can be digitized and analyzed regarding the frequency, amplitude and phase variation of the SWs. The power consumption and chip area of the whole OCO are estimated to 166.4 mW and 1.31 mm2, respectively.

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Egel, E., Csaba, G., Dietz, A., Breitkreutz-Von Gamm, S., Russer, J., Russer, P., … Becherer, M. (2018). Design of a 40-nm CMOS integrated on-chip oscilloscope for 5-50 GHz spin wave characterization. AIP Advances, 8(5). https://doi.org/10.1063/1.5007435

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