An evolvable image filter: Experimental evaluation of a complete hardware implementation in FPGA

Abstract

This paper describes an evolvable image filter which is completely implemented in a field programmable gate array. The proposed system is able to evolve an image filter in a few seconds if corrupted and original images are supplied by user. The architecture is generic and can easily be modified to realize other evolvable systems. COMBO6 card with Xilinx Virtex xc2v3000 FPGA is used as a target platform. © Springer-Verlag Berlin Heidelberg 2005.