Abstract
A method for estimating the power on architecture-level is described. Originally based on simulations with data sequences, the method is extended by an simulation-free approach. The statistical properties required for the underlying Dual-Bit-Type model are propagated through the circuit. The necessary computation formulas are presented. For both approaches, the model accuracy for base modules as for signal processing applications is comparably low.
Cite
CITATION STYLE
Freimann, A. (2002). Probabilistic power estimation for digital signal processing architectures. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 2451, pp. 458–467). Springer Verlag. https://doi.org/10.1007/3-540-45716-x_46
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