Abstract
This chapter presents a survey and classification of architectures for integrated circuit implementation of digital pulse-width modulators (DPWM) targeting digital control of high-frequency switching DC-DC power converters. In order to optimize circuit resources in terms of occupied area and power consumption, architectures based on tapped delay lines are studied, which includes segmentation of the input digital code to drive binary-weighted delay cells and thermometer-decoded unary delay cells. Integrated circuit design of a particular example of the segmented DPWM is described. © 2012 Springer Science+Business Media B.V.
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CITATION STYLE
Alarcón, E., Yousefzadeh, V., Prodić, A., & Maksimović, D. (2012). Data conversion pulse-width modulators for switch-mode power converter digital control. In Analog Circuit Design - Low Voltage Low Power; Short Range Wireless Front-Ends; Power Management and DC-DC, AACD 2011 (pp. 283–303). Kluwer Academic Publishers. https://doi.org/10.1007/978-94-007-1926-2_14
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