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Effect of Process-Induced Mechanical Stress on Circuit Layout

  • Miura H
  • Tanizaki Y
Springer Vienna, (1995), 147-150
DOI: 10.1007/978-3-7091-6619-2_34
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Miura, H., & Tanizaki, Y. (1995). Effect of Process-Induced Mechanical Stress on Circuit Layout. In Simulation of Semiconductor Devices and Processes (pp. 147–150). Springer Vienna. https://doi.org/10.1007/978-3-7091-6619-2_34

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