Abstract
This chapter describes the basic operating principle and presents the major reliability and scaling limitations of floating gate NAND non-volatile memory as used in SSD applications. It further discusses charge trapping memory cells as a potential replacement for floating gate cells in the NAND array and evaluates the potential of both memory cell types with regard to 3D NAND applications as will be described in the next chapter.
Author supplied keywords
- 3D NAND geometry
- CD variations
- Capacitive coupling model
- Cell cross-coupling
- Charge retention
- Charge trapping cells
- Double patterning
- Erase saturation
- Floating gate NAND
- Memory cell scaling
- Non-volatile memory
- Optical lithography gap
- Pass disturb
- Pass window
- Program disturb
- Program saturation
- Program/erase cycling endurance
- Quadruple patterning
- Random telegraph noise
- Self-boosted program inhibit
Cite
CITATION STYLE
APA
Beug, M. F. (2018). 2D NAND flash technology. In Springer Series in Advanced Microelectronics (Vol. 37, pp. 61–104). Springer Verlag. https://doi.org/10.1007/978-981-13-0599-3_4
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