Analysis of power consumption in memory hierarchies

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Abstract

In this paper, we note and analyze a key trade-off: as the complexity of caches increases (higher set-associativity, larger block size, and larger overall size), the power consumed by a cache access increases. However, because the hit rate also increases, the number of main memory accesses decreases and thus the power consumed by a memory access decreases. Recent papers which consider the power consumption of caches tend to ignore hit rates. This is unfortunate, because it is undesirable to have energy-efficient caches which are also very slow. Hit rates also play a key role in truly evaluating the energy efficiency of a cache, because low hit rates lead to more frequent main memory accesses which consume more power than cache accesses.

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APA

Hicks, P., Walnock, M., & Owens, R. M. (1997). Analysis of power consumption in memory hierarchies. In International Symposium on Low Power Electronics and Design, Digest of Technical Papers (pp. 239–242). IEEE. https://doi.org/10.1145/263272.263342

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