Machine Learning in Physical Verification, Mask Synthesis, and Physical Design

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Abstract

Yield, turn-around time, and chip quality are always of significant concerns for VLSI designs. The performance and efficiency of key design steps such as physical design, mask synthesis, and physical verification are critical to guarantee fast design closure and manufacturability. Recent advances in machine learning provide various new opportunities and approaches to tackle these challenges. This chapter will discuss several applications of machine learning in the backend design flow and demonstrate its impacts to existing design automation methodology.

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Lin, Y., & Pan, D. Z. (2019). Machine Learning in Physical Verification, Mask Synthesis, and Physical Design. In Machine Learning in VLSI Computer-Aided Design (pp. 95–115). Springer International Publishing. https://doi.org/10.1007/978-3-030-04666-8_4

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