Electrical and material characteristics of hafnium oxide with silicon interface passivation on III-V substrate for future scaled cmos technology

Abstract

Electrical properties of Hf-based high-k dielectric materials on compound semiconductor such as GaAs, InGaAs and InP are studied based on understanding of physics, reliability, and process development in MOSCAP and MOSFET characteristics. Our research focus on several approaches to develop and understanding the electrical characteristics of TaN/HfO2/GaAs MOS capacitors with Si interface passivation layer (IPL) under various post-deposition anneal (PDA) condition and various physical vapor deposition (PVD) Si deposition temperature/time will be described. The insertion of the ultra thin Si layer is designed to establish one-to-one registry between the semiconductor and the insulator and also, in the case of SiO2, prevents the GaAs from oxidation. Depletion mode transistor and self-aligned n-and p-channel enhancement GaAs MOSFETs using HfO2 and silicon IPL with the results of plausible characteristics will be presented. We will also present the investigation In0.2Ga0.8As, high-indium-content In0.53Ga0.47As, and InP MOSCAP and MOSFET using the same oxide of HfO2 as gate insulator with Si IPL. We present the electrical characteristics of TaN/HfO2/InGaAs (and InP) MOS capacitors with Si IPL under various PDA (post-deposition anneal) condition and various Si deposition time. Also, we will review the effects of hydrogen incorporation for In0.2Ga0.8As MOSCAP using H2 annealing. © 2010 Springer US.