An improved reverse converter for the moduli set {2n - 1, 2 n, 2n + 1, 2n+1 - 1}

Abstract

In this paper, a new reverse converter for the moduli set {2n -1, 2n, 2n +1, 2n+1 -1} is presented. We improved a previously introduced reverse converter architecture for deriving a high-speed hardware design. Hardware architecture of the proposed converter is based on adders, without the need for ROM or Multiplier. The presented design resulted in a significant reduction in conversion delay in comparison to the last reverse converter for the moduli set {2n - 1, 2n, 2n + l, 2n+1 -1}. © IEICE 2008.