Smart power DMOSes are analyzed under thermally unstable conditions up to the destruction level using a new compact version of the transient interferometric mapping (TIM) method. High accuracy phase measurements are achieved employing superluminescent diodes and focal plane array cameras. Two-dimensional thermal mapping at two time instants during a single stress pulse is performed in the range of 100 μs to few milliseconds. The size of the region where the parasitic bipolar transistor becomes thermally activated at the onset of thermal runaway is determined. The results are correlated to conventional failure analysis. © 2009 Elsevier Ltd. All rights reserved.
Haberfehlner, G., Bychikhin, S., Dubec, V., Heer, M., Podgaynaya, A., Pfost, M., … Pogany, D. (2009). Thermal imaging of smart power DMOS transistors in the thermally unstable regime using a compact transient interferometric mapping system. Microelectronics Reliability, 49(9–11), 1346–1351. https://doi.org/10.1016/j.microrel.2009.07.032