Criterion to evaluate input-Offset voltage of a latch-Type sense amplifier

  • Do A
  • Kong Z
  • Yeo K
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In advanced CMOS technologies where device mismatches are of major reliability concern, predicting the input-offset voltage of the sensing circuit is a crucial step in the design process as it has a direct impact on the yield. This work uses the Taylor expansion to derive a criterion to evaluate input-offset voltage of a latch-type voltage-mode sense amplifier. By innovatively setting the correct sensing criterion, this method provides a very simple, yet accurate and robust model to quan- tify the input-offset of the sense amplifier. The resulting offset expression incorporates three types of device mismatches, namely the threshold voltage @???A, the trans-conductance (ua gH? W/L) and the capacitance (C). The model is then analyzed under the worst-case scenario. It is shown that ??? has the greatest influence on the offset voltage, followed by K and C mismatches. Second-order approximation is also considered when high-level mismatches are present. Extensive simulations have also been car- ried out to verify the accuracy of the model using three different CMOS

Author-supplied keywords

  • Latch-type sense amplifier
  • Mismatch
  • SRAM
  • Sensing circuit

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  • Anh Tuan Do

  • Zhi Hui Kong

  • Kiat Seng Yeo

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