For large, complex ICs, engineers need efficient techniques for debugging first silicon. The system presented here consists of an on-chip debug infrastructure and supporting debugger software, which interacts with the infrastructure to make the chip's features accessible through a serial interface. © 2002, IEEE. All rights reserved.
CITATION STYLE
Vermeulen, B. (2002). Design for Debug: Catching Design Errors in Digital Chips. IEEE Design and Test of Computers, 19(3), 35–43. https://doi.org/10.1109/MDT.2002.1003792
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