Evaluation of Design Alternatives for a Multiprocessor Microprocessor

  • Hammond L
  • Nayfeh B
  • Olukotun K
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Abstract

In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider three architectures: shared-primary cache, shared-secondary cache, and shared-memory. We evaluate these three architectures using a complete system simulation environment which models the CPU, memory hierarchy and I/O devices in sufficient detail to boot and run a commercial operating system. Within our simulation environment, we measure performance using representative hand and compiler generated parallel applications, and a multiprogramming workload. Our results show that when applications exhibit fine-grained sharing, both shared-primary and shared-secondary architectures perform similarly when the full costs of sharing the primary cache are included.

Author-supplied keywords

  • Scalable Shared Memory Multiprocessors
  • backward error recovery
  • coherence protocol
  • fault-tolerance

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Authors

  • Lance Hammond

  • Basem A. Nayfeh

  • Kunle Olukotun

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