Transactional memory is a promising approach to ease parallel programming. Hardware transactional memory system designs reflect choices along three key design dimensions: conflict detection, version management, and conflict resolution. The authors identify a set of performance pathologies that could degrade performance in proposed HTM designs. Improving conflict resolution could eliminate these pathologies so designers can build robust HTM systems. © 2008 IEEE.
CITATION STYLE
Bobba, J., Moore, K. E., Volos, H., Yen, L., Hill, M. D., Swift, M. M., & Wood, D. A. (2008). Performance pathologies in hardware transactional memory. IEEE Micro, 28(1), 32–41. https://doi.org/10.1109/MM.2008.11
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