CMOS analog integrated circuits based on weak inversion operations

Abstract

A simple model describing the dc behavior of MOS transis- tors operating in weak inversion is derived on the basis of previous publications. This model includes only two parameters and is suitable for circuit design. It is verified experimentally for both p- and n- channel test transistors of a Si-gate low-voltage CMOS technology. Various circuit configurations taking advantage of weak inversion oper- ation are described and analyzed: two different current references based on known bipolar circuits, an amplitude detector scheme which is then applied to a quartz oscillator with the result of a very low-power con- sumption (