The torus routing chip

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Abstract

The torus routing chip (TRC) is a selftimed chip that performs deadlock-free cut-through routing in k-ary n-cube multiprocessor interconnection networks using a new method of deadlock avoidance called virtual channels. A prototype TRC with byte wide self-timed communication channels achieved on first silicon a throughput of 64 Mbits/s in each dimension, about an order of magnitude better performance than the communication networks used by machines such as the Caltech Cosmic Cube or Intel iPSC. The latency of the cut-through routing of only 150 ns per routing step largely eliminates message locality considerations in the concurrent programs for such machines. The design and testing of the TRC as a self-timed chip was no more difficult than it would have been for a synchronous chip. © 1986 Springer-Verlag.

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APA

Dally, W. J., & Seitz, C. L. (1986). The torus routing chip. Distributed Computing, 1(4), 187–196. https://doi.org/10.1007/BF01660031

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