Abstract
A 2304-bit flexible decoder for low-density parity-check (LDPC) codes is presented for Wireless-MAN applications. Based on modified turbo-decoding message-passing (M-TDMP) algorithm, the decoder achieves low complexity as well as fast convergence which produces high throughput of 138Mbps working at 50MHz. By adopting a novel scheme for early termination of iteration, the proposed decoder obtains large power efficiency. The decoder is implemented in SMIC 0.18um 1P6M CMOS technology, features a power dissipation of 179-mW operating at 50MHz, and costs an area of 12.5 mm2. © 2008 IEEE.
Cite
CITATION STYLE
Bao, D., Xiang, B., Shen, R., Pan, A., Chen, Y., & Zeng, X. Y. (2008). A 179-mW 2304-bit flexible LDPC decoder for Wireless-MAN applications. In International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT (pp. 1625–1628). https://doi.org/10.1109/ICSICT.2008.4734861
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