Abstract
A new parallel ADC architecture is presented which makes use of neuromorphic principles to be fast, accurate, and robust to noise and circuit mismatch. The architecture uses spiking integrate-and-fire neurons as base elements, with lateral inhibition to decohere the parallel pathways, and alternate on-and off-triggered paths to maintain a constant spike rate. Results from a proof-of-concept circuit reinforce the analytical conclusion that this circuit can make a practical ADC. © 2012 IEEE.
Cite
CITATION STYLE
Tapson, J., & Van Schaik, A. (2012). An asynchronous parallel neuromorphic ADC architecture. In ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (pp. 2409–2412). https://doi.org/10.1109/ISCAS.2012.6271783
Register to see more suggestions
Mendeley helps you to discover research relevant for your work.
