Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor
Ieee Micro (2010)
- ISSN: 02721732
- DOI: 10.1109/MM.2010.31
Available from ieeexplore.ieee.org
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Abstract
The 12-core AMD Opteron processor, code-named "Magny Cours," combines advances in silicon, packaging, interconnect, cache coherence protocol, and server architecture to increase the compute density of high-volume commodity 2P/4P blade servers while operating within the same power envelope as earlier-generation AMD Opteron processors. A key enabling feature, the probe filter, reduces both the bandwidth overhead of traditional broadcast-based coherence and memory latency.
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Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor
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