Defect-based compact modeling for RTN and BTI variability

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Abstract

This paper describes a defect-centric based compact modeling methodology for time-dependent threshold voltage variability (VTH), induced by Bias Temperature Instability (BTI) and Random Telegraph Noise (RTN). A Verilog-A based model wrapper is used to implement a threshold voltage shift by adding a variable voltage source at the gate of the core device model. This compact model allows to incorporate all BTI and RTN related electrostatics and kinetics in standard EDA-Tools as a 'black box' without any custom simulation flow. It can therefore be used in either a manual configuration for academic purposes or be integrated as is into industry standard EDA tools and simulation flows.

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Weckx, P., Simicic, M., Nomoto, K., Ono, M., Parvais, B., Kaczer, B., … Mocuta, A. (2017). Defect-based compact modeling for RTN and BTI variability. In IEEE International Reliability Physics Symposium Proceedings (p. CR7.1-CR7.6). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/IRPS.2017.7936356

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