A hardware acceleration of a real time video processing

Abstract

This paper presents a method based on Edge histogram descriptor to accelerate shot cut detector algorithm for real-time applications. In fact, before any content-based manipulations, the hierarchical structure of video must be determined and software pure solution is not suitable for this application due of constraints imposed by this algorithm. In this context we have used a Field Programmable Gate Array (FPGA) integrated architecture to accelerate this treatment. © 2012 IEEE.