Abstract
This paper describes the Next generation Intel® micro-architecture (Nehalem) 45nm IA processor's Core and I/O clocking architecture. Among the highlights are: configurable clocking, fast-lock low-skew PLLs, high reference clock frequencies, analog supply tracking system, adaptive frequency clocking, low jitter Intel® QuickPath interconnect and Intel® QuickPath memory controller clock generation, and jitter-attenuating DLLs. © 2008 IEEE.
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CITATION STYLE
Kurd, N., Douglas, J., Mosalikanti, P., & Kumar, R. (2008). Next generation Intel® micro-architecture (Nehalem) clocking architecture. In IEEE Symposium on VLSI Circuits, Digest of Technical Papers (pp. 62–63). Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/VLSIC.2008.4585952
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