Novel Multirate Digital Filter for EEG on FPGA

Abstract

A new denoising multirate system method of using field-programmable gate array (FPGA) chip for bio-chip design implementation of EEG signal is appeared in this article. The ALTERA Cyclone II FPGA board development board implements this bio-chip in real-Time with processors EP2C35F672C6 for the proper data accuracy. Modelsim is used for simulation of biochip design in Verilog HDL. In this paper denoising on multirate system is used with support of up-sampler or interpolate, moving average filter and downs-sampler or decimator for removing of noise by bio-chip. This biochip shows good enough electrical characteristics such as less area and power, low voltage current, enough memory storage spaces, null delay.