Partitioning logic to optimize routability on graph structures

Abstract

The problem of partitioning the nodes of a logic network (i.e., a hypergraph) on to the vertices of a partition graph G, in which the cost function to be minimized is the cost of global routing, (i.e., the cost of routing the nets of the logic on the edges of the graph G), is studied. Each vertex of the partition graph has a given upper bound on the number of nodes of the logic that can be assigned to the vertex. The nets of the logic network and the edges of the partition graph may have weights associated with them, which appear as multiplicative factors in the routing cost function. This partitioning program is called the min-cost partitioning on a graph (MCPG) problem. The MCPG model is very general and can be applied in many partitioning situations arising in VLSI physical design. Two such applications are described.