Abstract
This paper describes a technique for the design of two-signal four-quadrant multipliers, linear on both inputs and useful from dc to an upper frequency very close to the ft of the transistors comprising the circuit. The precision of the product is shown to be limited primarily by the matching of the transistors, particularly with reference to emitter-junction areas. Expressions are derived for the nonlineafities due to various causes. Copyright © 1968 by The Institute of Electrical and Electronics Engineers, Inc.
Cite
CITATION STYLE
Gilbert, B. (1968). A Precise Four-Quadrant Multiplier with Subnanosecond Response. IEEE Journal of Solid-State Circuits, 3(4), 365–373. https://doi.org/10.1109/JSSC.1968.1049925
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