Problems and issues in SOI CMOS technology

Abstract

Various issues in SOI (silicon-on-insulator) CMOS technology are reviewed. In particular, it is pointed out that from a device standpoint, the 'nice' properties of FD SOI MOSFETs, such as high saturation current and sharp subthreshold slope, are now overshadowed by unwanted floating substrate effects. The most serious of these is caused by the lateral bipolar, which causes snapback in long-channel devices. The snapback reduces to low BVDS in shorter-channel devices. There are indications that SOI may have a better BVDS than bulk for L < 0.3 μm. The physics underlying hot-carrier degradation effects remains basically unresolved in thin-film SOI devices. At the circuit level, SPICE versions of SOI MOSFET models need to be commercially available, as well as cell libraries. ESD protection structures, using either diode or snapback transistors, have to be assessed.