Abstract
The realization of a CMOS transceiver that complies with the specifications of a high-quality digital-wireless system requires overall integration of architecture, building blocks and transistor-level design. A highly-integrated architecture minimizes the number of high-frequency external nodes, as these are difficult to drive with CMOS circuits. Up- and downconversion topologies allow at the same time mixing and a high-quality on-chip single-ended to differential conversion. Extra buffers between building blocks optimize overall circuit performance.
Cite
CITATION STYLE
Steyaert, M., Borremans, M., Janssens, J., De Muer, B., Itoh, N., Craninckx, J., … Sansen, W. (1998). Single-chip CMOS transceiver for DCS-1800 wireless communications. In Digest of Technical Papers - IEEE International Solid-State Circuits Conference (pp. 48–49, 411). IEEE. https://doi.org/10.1109/isscc.1998.672370
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