A unified approach for verification and validation of systems and software engineering models

Abstract

We present in this paper a unified paradigm for the verification and validation of software and systems engineering design models expressed in UML 2.0 or SysML. This paradigm relies on an established synergy between three salient approaches, which are model-checking, program analysis, and software engineering techniques. To illustrate the accomplishment of our results, we have designed and implemented an integrated and automated computer-aided assessment tool. We provide three case studies for sequence, state machine, and class and package diagrams to demonstrate the benefits of our methodology. © 2006 IEEE.